New 3D Chip Combines Computing, Data Storage

Now, researchers at Stanford University and MIT have built a new chip which combines computing and data storage. The functionality of two different chips combined together.

The new 3-D computer architecture provides dense and fine-grained integration of computating and data storage, drastically moving data between chips. As a result, the chip is able to store massive amounts of data. Perform on-chip processing to transform a data accumulation into useful information.

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However, till now the computers contained two chips. One for computing and separate chip for data storage, and the connections between the two are limited. Researchers Max Shulaker, an assistant professor of electrical engineering and computer science at MIT. Shulaker began the work as a PhD student alongside H.-S. Philip Wong and his advisor Subhasish Mitra, professors of electrical engineering and computer science at Stanford. The team also included professors Roger Howe and Krishna Saraswat, also from Stanford. Designed new prototype chip uses multiple nanotechnologies, together with a new computer architecture.

The chip uses carbon nanotubes, sheets of 2-D graphene formed into nanocylinders. And resistive random-access memory (RRAM) cells. A type of nonvolatile memory that operates by changing the resistance of a solid dielectric material. Moreover, researchers integrated over 1 million RRAM cells and 2 million carbon nanotube field-effect transistors. Making the most complex nanoelectronic system ever made with emerging nanotechnologies.

Interleaving layers of logic and memory

The RRAM and carbon nanotubes built vertically over one another. Making a new, dense 3-D computer architecture with interleaving layers of logic and memory. By inserting ultradense wires between these layers, this 3-D architecture promises to address the communication. Such an architecture is not possible with existing silicon-based technology. The key work is carbon nanotube circuits and RRAM memory fabrication at much lower temperatures, below 200 C. This provides several simultaneous benefits for future computing systems.

Furthermore, the devices are better, Logic made from carbon nanotubes order of magnitude more energy-efficient compared to today’s logic made from silicon, and similarly, RRAM can be denser, faster, and more energy-efficient compared to DRAM. Whereas, referring to a conventional memory known as dynamic random-access memory.

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In addition, on the top layer of the chip they placed over 1 million carbon nanotube-based sensors, which they used to detect and classify ambient gases. Due to the layering of sensing, data storage, and computing, the chip was able to measure each of the sensors in parallel, and then write directly into its memory, generating huge bandwidth.

This work funded by the Defense Advanced Research Projects Agency, the National Science Foundation, Semiconductor Research Corporation, STARnet SONIC, and member companies of the Stanford SystemX Alliance.