Researchers design a chip that check for sabotage read more at here www.spinonews.com/index.php/item/785-researchers-design-a-chip-that-check-for-sabotage

The outsourcing of microchip design and fabrication worldwide worth in the excess of $350billion, but it is an industry whose supply chain is vulnerable to those looking to install malicious circuitry. These malicious securities described as a ‘Trojan Horse’ may look harmless but can allow attackers to sabotage.

Researcher Siddharth Garg from NYU Tandon School of Engineering, and fellow researchers are developing a chip with both an embedded and external module. They first prove the chip’s calculations are correct, the second then validates the first module's proofs.

While software viruses are easy to spot and fix with downloadable patches, deliberately inserted defects are almost invisible. For example, a secretly inserted ‘back door’ function could allow attackers to alter or take over a device or system at a time of their choosing.

According to Garg’s configuration, an example of an approach called verifiable computing (VC), is able to monitor a chip's performance and can spot warning signs of Trojans.

This approach allows the verifying processor to be fabricated separately from the chip. By employing an external verification unit, the chip designer can turn to an untrusted foundry to produce a chip that not only produces the circuitry-performing computations but a module that presents proofs of correctness.

The chip designer then turns to a trusted foundry to build a separate, less complex module: an ASIC (application specific integrated circuit), with the sole job of validating the proofs of correctness generated by the internal module of the untrusted chip.

 

An added advantage is that the chip built by the external foundry is smaller, faster, and more power-efficient than the trusted ASIC. The VC setup can potentially reduce the time, energy, and chip area needed to generate proofs.